#line 1 "main.c"
















 







typedef struct
{
	unsigned int	StartAddress;			
	unsigned short	Status;					
	unsigned short	PacketLength;			
	unsigned short	PacketStartAddressH;	
	unsigned short	PacketStartAddressL;	
	unsigned short	LastDesc;				
} _rx_descriptor;


typedef struct
{
	_rx_descriptor* RxCurrentDescriptor;	
	unsigned short Number;					
} _rx_current_descriptor;


typedef struct
{
	unsigned int	StartAddress;			
	unsigned short	Status;					
	unsigned short	PacketLength;			
	unsigned short	PacketStartAddressH;	
	unsigned short	PacketStartAddressL;	
	unsigned short	LastDesc;				
} _tx_descriptor;


typedef struct
{
	_tx_descriptor* TxCurrentDescriptor;	
	unsigned short Number;					
	unsigned int FirstEmptyWord;			
} _tx_current_descriptor;

#line 1 "config.h"




typedef struct
{
	unsigned int MAC_CTRL;
    unsigned int MinFrame;
    unsigned int MaxFrame;
    unsigned int CollConfig;
    unsigned int IPGTx;
    unsigned int MAC_ADDR_T;
    unsigned int MAC_ADDR_M;
    unsigned int MAC_ADDR_H;
    unsigned int HASH0;
    unsigned int HASH1;
    unsigned int HASH2;
    unsigned int HASH3;
    unsigned int INT_MSK;
    unsigned int INT_SRC;
    unsigned int PHY_CTRL;
    unsigned int PHY_STAT;
    unsigned int RXBF_HEAD;
    unsigned int RXBF_TAIL;
    unsigned int dammy0;
    unsigned int dammy1;
    unsigned int STAT_RX_ALL;
    unsigned int STAT_RX_OK;
    unsigned int STAT_RX_OVF;
    unsigned int STAT_RX_LOST;
    unsigned int STAT_TX_ALL;
    unsigned int STAT_TX_OK;
    unsigned int base_RxBF;
    unsigned int base_TxBF;
    unsigned int base_RxBD;
    unsigned int base_TxBD;
    unsigned int base_RG;
    unsigned int GCTRL;
} _ethernet;


























#line 1 ".\\inc\\1901BC1F.h"





















 

 





 



 



 



 

typedef enum IRQn
{
 
  NonMaskableInt_IRQn         = -14,     
  HardFault_IRQn              = -13,     
  MemoryManagement_IRQn       = -12,     
  BusFault_IRQn               = -11,     
  UsageFault_IRQn             = -10,     
  SVCall_IRQn                 = -5,      
  PendSV_IRQn                 = -2,      
  SysTick_IRQn                = -1,      

 
  SSP3_IRQn                   = 0,       
  SSP4_IRQn                   = 1,       
  USB_IRQn                    = 2,       
  DSP_BSP1_IRQn               = 3,       
  DSP_BSP2_IRQn               = 4,       
  DMA_IRQn                    = 5,       
  UART1_IRQn                  = 6,       
  UART2_IRQn                  = 7,       
  SSP1_IRQn                   = 8,       
  DSP_BSP3_IRQn               = 9,       
  I2C_IRQn                    = 10,      
  Power_IRQn                  = 11,      
  WWDG_IRQn                   = 12,      
  DSP_DMA_IRQn				  = 13,		 		
  Timer1_IRQn                 = 14,      
  Timer2_IRQn                 = 15,      
  Timer3_IRQn                 = 16,      
  ADC_IRQn                    = 17,      
  COMPARATOR_IRQn             = 19,      
  SSP2_IRQn                   = 20,      
  DSP_ACD_IRQn                = 21,      
  DSP_CRPT_IRQn               = 22,      
  DSP_TIM_IRQn                = 23,      
  DSP_IRQ_IRQn                = 24,      
  DSP_STATE_IRQn              = 25,      
  UART3_IRQn                  = 26,      
  BACKUP_IRQn                 = 27,      
  EXT_INT1_IRQn               = 28,      
  EXT_INT2_IRQn               = 29,      
  EXT_INT3_IRQn               = 30,      
  EXT_INT4_IRQn               = 31       
}IRQn_Type;

 
#line 1 "D:\\ARM Tools\\Keil MDK ARM\\ARM\\CMSIS\\Include\\core_cm3.h"
 




















 






















 




 


 

 













#line 89 "D:\\ARM Tools\\Keil MDK ARM\\ARM\\CMSIS\\Include\\core_cm3.h"


 







#line 119 "D:\\ARM Tools\\Keil MDK ARM\\ARM\\CMSIS\\Include\\core_cm3.h"

#line 1 "D:\\ARM Tools\\Keil MDK ARM\\ARM\\RV31\\Inc\\stdint.h"
 
 





 









#line 25 "D:\\ARM Tools\\Keil MDK ARM\\ARM\\RV31\\Inc\\stdint.h"







 

     

     
typedef   signed          char int8_t;
typedef   signed short     int int16_t;
typedef   signed           int int32_t;
typedef   signed       __int64 int64_t;

     
typedef unsigned          char uint8_t;
typedef unsigned short     int uint16_t;
typedef unsigned           int uint32_t;
typedef unsigned       __int64 uint64_t;

     

     
     
typedef   signed          char int_least8_t;
typedef   signed short     int int_least16_t;
typedef   signed           int int_least32_t;
typedef   signed       __int64 int_least64_t;

     
typedef unsigned          char uint_least8_t;
typedef unsigned short     int uint_least16_t;
typedef unsigned           int uint_least32_t;
typedef unsigned       __int64 uint_least64_t;

     

     
typedef   signed           int int_fast8_t;
typedef   signed           int int_fast16_t;
typedef   signed           int int_fast32_t;
typedef   signed       __int64 int_fast64_t;

     
typedef unsigned           int uint_fast8_t;
typedef unsigned           int uint_fast16_t;
typedef unsigned           int uint_fast32_t;
typedef unsigned       __int64 uint_fast64_t;

     
typedef   signed           int intptr_t;
typedef unsigned           int uintptr_t;

     
typedef   signed       __int64 intmax_t;
typedef unsigned       __int64 uintmax_t;




     

     





     





     





     

     





     





     





     

     





     





     





     

     


     


     


     

     


     


     


     

     



     



     


     
    
 



#line 196 "D:\\ARM Tools\\Keil MDK ARM\\ARM\\RV31\\Inc\\stdint.h"

     







     










     











#line 260 "D:\\ARM Tools\\Keil MDK ARM\\ARM\\RV31\\Inc\\stdint.h"



 


#line 121 "D:\\ARM Tools\\Keil MDK ARM\\ARM\\CMSIS\\Include\\core_cm3.h"
#line 1 "D:\\ARM Tools\\Keil MDK ARM\\ARM\\CMSIS\\Include\\core_cmInstr.h"
 




















 





 



 


 









 







 







 






 








 







 







 









 









 
__attribute__((section(".rev16_text"))) static __inline __asm uint32_t __REV16(uint32_t value)
{
  rev16 r0, r0
  bx lr
}








 
__attribute__((section(".revsh_text"))) static __inline __asm int32_t __REVSH(int32_t value)
{
  revsh r0, r0
  bx lr
}









 











 









 









 









 











 











 











 







 










 










 









 






#line 615 "D:\\ARM Tools\\Keil MDK ARM\\ARM\\CMSIS\\Include\\core_cmInstr.h"

   

#line 122 "D:\\ARM Tools\\Keil MDK ARM\\ARM\\CMSIS\\Include\\core_cm3.h"
#line 1 "D:\\ARM Tools\\Keil MDK ARM\\ARM\\CMSIS\\Include\\core_cmFunc.h"
 




















 





 



 


 





 
 






 
static __inline uint32_t __get_CONTROL(void)
{
  register uint32_t __regControl         __asm("control");
  return(__regControl);
}







 
static __inline void __set_CONTROL(uint32_t control)
{
  register uint32_t __regControl         __asm("control");
  __regControl = control;
}







 
static __inline uint32_t __get_IPSR(void)
{
  register uint32_t __regIPSR          __asm("ipsr");
  return(__regIPSR);
}







 
static __inline uint32_t __get_APSR(void)
{
  register uint32_t __regAPSR          __asm("apsr");
  return(__regAPSR);
}







 
static __inline uint32_t __get_xPSR(void)
{
  register uint32_t __regXPSR          __asm("xpsr");
  return(__regXPSR);
}







 
static __inline uint32_t __get_PSP(void)
{
  register uint32_t __regProcessStackPointer  __asm("psp");
  return(__regProcessStackPointer);
}







 
static __inline void __set_PSP(uint32_t topOfProcStack)
{
  register uint32_t __regProcessStackPointer  __asm("psp");
  __regProcessStackPointer = topOfProcStack;
}







 
static __inline uint32_t __get_MSP(void)
{
  register uint32_t __regMainStackPointer     __asm("msp");
  return(__regMainStackPointer);
}







 
static __inline void __set_MSP(uint32_t topOfMainStack)
{
  register uint32_t __regMainStackPointer     __asm("msp");
  __regMainStackPointer = topOfMainStack;
}







 
static __inline uint32_t __get_PRIMASK(void)
{
  register uint32_t __regPriMask         __asm("primask");
  return(__regPriMask);
}







 
static __inline void __set_PRIMASK(uint32_t priMask)
{
  register uint32_t __regPriMask         __asm("primask");
  __regPriMask = (priMask);
}








 







 








 
static __inline uint32_t  __get_BASEPRI(void)
{
  register uint32_t __regBasePri         __asm("basepri");
  return(__regBasePri);
}







 
static __inline void __set_BASEPRI(uint32_t basePri)
{
  register uint32_t __regBasePri         __asm("basepri");
  __regBasePri = (basePri & 0xff);
}







 
static __inline uint32_t __get_FAULTMASK(void)
{
  register uint32_t __regFaultMask       __asm("faultmask");
  return(__regFaultMask);
}







 
static __inline void __set_FAULTMASK(uint32_t faultMask)
{
  register uint32_t __regFaultMask       __asm("faultmask");
  __regFaultMask = (faultMask & (uint32_t)1);
}




#line 293 "D:\\ARM Tools\\Keil MDK ARM\\ARM\\CMSIS\\Include\\core_cmFunc.h"


#line 612 "D:\\ARM Tools\\Keil MDK ARM\\ARM\\CMSIS\\Include\\core_cmFunc.h"

 


#line 123 "D:\\ARM Tools\\Keil MDK ARM\\ARM\\CMSIS\\Include\\core_cm3.h"








 
#line 153 "D:\\ARM Tools\\Keil MDK ARM\\ARM\\CMSIS\\Include\\core_cm3.h"

 






 
#line 169 "D:\\ARM Tools\\Keil MDK ARM\\ARM\\CMSIS\\Include\\core_cm3.h"

 












 


 





 


 
typedef union
{
  struct
  {

    uint32_t _reserved0:27;               





    uint32_t Q:1;                         
    uint32_t V:1;                         
    uint32_t C:1;                         
    uint32_t Z:1;                         
    uint32_t N:1;                         
  } b;                                    
  uint32_t w;                             
} APSR_Type;



 
typedef union
{
  struct
  {
    uint32_t ISR:9;                       
    uint32_t _reserved0:23;               
  } b;                                    
  uint32_t w;                             
} IPSR_Type;



 
typedef union
{
  struct
  {
    uint32_t ISR:9;                       

    uint32_t _reserved0:15;               





    uint32_t T:1;                         
    uint32_t IT:2;                        
    uint32_t Q:1;                         
    uint32_t V:1;                         
    uint32_t C:1;                         
    uint32_t Z:1;                         
    uint32_t N:1;                         
  } b;                                    
  uint32_t w;                             
} xPSR_Type;



 
typedef union
{
  struct
  {
    uint32_t nPRIV:1;                     
    uint32_t SPSEL:1;                     
    uint32_t FPCA:1;                      
    uint32_t _reserved0:29;               
  } b;                                    
  uint32_t w;                             
} CONTROL_Type;

 






 


 
typedef struct
{
  volatile uint32_t ISER[8];                  
       uint32_t RESERVED0[24];
  volatile uint32_t ICER[8];                  
       uint32_t RSERVED1[24];
  volatile uint32_t ISPR[8];                  
       uint32_t RESERVED2[24];
  volatile uint32_t ICPR[8];                  
       uint32_t RESERVED3[24];
  volatile uint32_t IABR[8];                  
       uint32_t RESERVED4[56];
  volatile uint8_t  IP[240];                  
       uint32_t RESERVED5[644];
  volatile  uint32_t STIR;                     
}  NVIC_Type;

 



 






 


 
typedef struct
{
  volatile const  uint32_t CPUID;                    
  volatile uint32_t ICSR;                     
  volatile uint32_t VTOR;                     
  volatile uint32_t AIRCR;                    
  volatile uint32_t SCR;                      
  volatile uint32_t CCR;                      
  volatile uint8_t  SHP[12];                  
  volatile uint32_t SHCSR;                    
  volatile uint32_t CFSR;                     
  volatile uint32_t HFSR;                     
  volatile uint32_t DFSR;                     
  volatile uint32_t MMFAR;                    
  volatile uint32_t BFAR;                     
  volatile uint32_t AFSR;                     
  volatile const  uint32_t PFR[2];                   
  volatile const  uint32_t DFR;                      
  volatile const  uint32_t ADR;                      
  volatile const  uint32_t MMFR[4];                  
  volatile const  uint32_t ISAR[5];                  
       uint32_t RESERVED0[5];
  volatile uint32_t CPACR;                    
} SCB_Type;

 















 






























 




#line 396 "D:\\ARM Tools\\Keil MDK ARM\\ARM\\CMSIS\\Include\\core_cm3.h"

 





















 









 


















 










































 









 









 















 






 


 
typedef struct
{
       uint32_t RESERVED0[1];
  volatile const  uint32_t ICTR;                     



       uint32_t RESERVED1[1];

} SCnSCB_Type;

 



 










 






 


 
typedef struct
{
  volatile uint32_t CTRL;                     
  volatile uint32_t LOAD;                     
  volatile uint32_t VAL;                      
  volatile const  uint32_t CALIB;                    
} SysTick_Type;

 












 



 



 









 






 


 
typedef struct
{
  volatile  union
  {
    volatile  uint8_t    u8;                   
    volatile  uint16_t   u16;                  
    volatile  uint32_t   u32;                  
  }  PORT [32];                           
       uint32_t RESERVED0[864];
  volatile uint32_t TER;                      
       uint32_t RESERVED1[15];
  volatile uint32_t TPR;                      
       uint32_t RESERVED2[15];
  volatile uint32_t TCR;                      
       uint32_t RESERVED3[29];                                  
  volatile  uint32_t IWR;                      
  volatile const  uint32_t IRR;                      
  volatile uint32_t IMCR;                     
       uint32_t RESERVED4[43];                                  
  volatile  uint32_t LAR;                      
  volatile const  uint32_t LSR;                      
       uint32_t RESERVED5[6];                                   
  volatile const  uint32_t PID4;                     
  volatile const  uint32_t PID5;                     
  volatile const  uint32_t PID6;                     
  volatile const  uint32_t PID7;                     
  volatile const  uint32_t PID0;                     
  volatile const  uint32_t PID1;                     
  volatile const  uint32_t PID2;                     
  volatile const  uint32_t PID3;                     
  volatile const  uint32_t CID0;                     
  volatile const  uint32_t CID1;                     
  volatile const  uint32_t CID2;                     
  volatile const  uint32_t CID3;                     
} ITM_Type;

 



 



























 



 



 



 









   






 


 
typedef struct
{
  volatile uint32_t CTRL;                     
  volatile uint32_t CYCCNT;                   
  volatile uint32_t CPICNT;                   
  volatile uint32_t EXCCNT;                   
  volatile uint32_t SLEEPCNT;                 
  volatile uint32_t LSUCNT;                   
  volatile uint32_t FOLDCNT;                  
  volatile const  uint32_t PCSR;                     
  volatile uint32_t COMP0;                    
  volatile uint32_t MASK0;                    
  volatile uint32_t FUNCTION0;                
       uint32_t RESERVED0[1];
  volatile uint32_t COMP1;                    
  volatile uint32_t MASK1;                    
  volatile uint32_t FUNCTION1;                
       uint32_t RESERVED1[1];
  volatile uint32_t COMP2;                    
  volatile uint32_t MASK2;                    
  volatile uint32_t FUNCTION2;                
       uint32_t RESERVED2[1];
  volatile uint32_t COMP3;                    
  volatile uint32_t MASK3;                    
  volatile uint32_t FUNCTION3;                
} DWT_Type;

 






















































 



 



 



 



 



 



 



























   






 


 
typedef struct
{
  volatile uint32_t SSPSR;                    
  volatile uint32_t CSPSR;                    
       uint32_t RESERVED0[2];
  volatile uint32_t ACPR;                     
       uint32_t RESERVED1[55];
  volatile uint32_t SPPR;                     
       uint32_t RESERVED2[131];
  volatile const  uint32_t FFSR;                     
  volatile uint32_t FFCR;                     
  volatile const  uint32_t FSCR;                     
       uint32_t RESERVED3[759];
  volatile const  uint32_t TRIGGER;                  
  volatile const  uint32_t FIFO0;                    
  volatile const  uint32_t ITATBCTR2;                
       uint32_t RESERVED4[1];
  volatile const  uint32_t ITATBCTR0;                
  volatile const  uint32_t FIFO1;                    
  volatile uint32_t ITCTRL;                   
       uint32_t RESERVED5[39];
  volatile uint32_t CLAIMSET;                 
  volatile uint32_t CLAIMCLR;                 
       uint32_t RESERVED7[8];
  volatile const  uint32_t DEVID;                    
  volatile const  uint32_t DEVTYPE;                  
} TPI_Type;

 



 



 












 






 



 





















 



 





















 



 



 


















 






   


#line 1107 "D:\\ARM Tools\\Keil MDK ARM\\ARM\\CMSIS\\Include\\core_cm3.h"






 


 
typedef struct
{
  volatile uint32_t DHCSR;                    
  volatile  uint32_t DCRSR;                    
  volatile uint32_t DCRDR;                    
  volatile uint32_t DEMCR;                    
} CoreDebug_Type;

 




































 






 







































 






 

 
#line 1227 "D:\\ARM Tools\\Keil MDK ARM\\ARM\\CMSIS\\Include\\core_cm3.h"

#line 1236 "D:\\ARM Tools\\Keil MDK ARM\\ARM\\CMSIS\\Include\\core_cm3.h"






 










 

 



 




 










 
static __inline void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
  uint32_t reg_value;
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07);                

  reg_value  =  ((SCB_Type *) ((0xE000E000UL) + 0x0D00UL) )->AIRCR;                                                    
  reg_value &= ~((0xFFFFUL << 16) | (7UL << 8));              
  reg_value  =  (reg_value                                 |
                ((uint32_t)0x5FA << 16) |
                (PriorityGroupTmp << 8));                                      
  ((SCB_Type *) ((0xE000E000UL) + 0x0D00UL) )->AIRCR =  reg_value;
}







 
static __inline uint32_t NVIC_GetPriorityGrouping(void)
{
  return ((((SCB_Type *) ((0xE000E000UL) + 0x0D00UL) )->AIRCR & (7UL << 8)) >> 8);    
}







 
static __inline void NVIC_EnableIRQ(IRQn_Type IRQn)
{
  ((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));  
}







 
static __inline void NVIC_DisableIRQ(IRQn_Type IRQn)
{
  ((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));  
}











 
static __inline uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
{
  return((uint32_t) ((((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));  
}







 
static __inline void NVIC_SetPendingIRQ(IRQn_Type IRQn)
{
  ((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));  
}







 
static __inline void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
{
  ((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));  
}










 
static __inline uint32_t NVIC_GetActive(IRQn_Type IRQn)
{
  return((uint32_t)((((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));  
}










 
static __inline void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
  if(IRQn < 0) {
    ((SCB_Type *) ((0xE000E000UL) + 0x0D00UL) )->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); }  
  else {
    ((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff);    }         
}












 
static __inline uint32_t NVIC_GetPriority(IRQn_Type IRQn)
{

  if(IRQn < 0) {
    return((uint32_t)(((SCB_Type *) ((0xE000E000UL) + 0x0D00UL) )->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS)));  }  
  else {
    return((uint32_t)(((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->IP[(uint32_t)(IRQn)]           >> (8 - __NVIC_PRIO_BITS)));  }  
}













 
static __inline uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
  uint32_t PriorityGroupTmp = (PriorityGroup & 0x07);           
  uint32_t PreemptPriorityBits;
  uint32_t SubPriorityBits;

  PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
  SubPriorityBits     = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;

  return (
           ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) |
           ((SubPriority     & ((1 << (SubPriorityBits    )) - 1)))
         );
}













 
static __inline void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
{
  uint32_t PriorityGroupTmp = (PriorityGroup & 0x07);           
  uint32_t PreemptPriorityBits;
  uint32_t SubPriorityBits;

  PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
  SubPriorityBits     = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;

  *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1);
  *pSubPriority     = (Priority                   ) & ((1 << (SubPriorityBits    )) - 1);
}





 
static __inline void NVIC_SystemReset(void)
{
  __dsb(0xF);                                                     
 
  ((SCB_Type *) ((0xE000E000UL) + 0x0D00UL) )->AIRCR  = ((0x5FA << 16)      |
                 (((SCB_Type *) ((0xE000E000UL) + 0x0D00UL) )->AIRCR & (7UL << 8)) |
                 (1UL << 2));                    
  __dsb(0xF);                                                      
  while(1);                                                     
}

 



 




 

















 
static __inline uint32_t SysTick_Config(uint32_t ticks)
{
  if (ticks > (0xFFFFFFUL << 0))  return (1);             

  ((SysTick_Type *) ((0xE000E000UL) + 0x0010UL) )->LOAD  = (ticks & (0xFFFFFFUL << 0)) - 1;       
  NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1);   
  ((SysTick_Type *) ((0xE000E000UL) + 0x0010UL) )->VAL   = 0;                                           
  ((SysTick_Type *) ((0xE000E000UL) + 0x0010UL) )->CTRL  = (1UL << 2) |
                   (1UL << 1)   |
                   (1UL << 0);                     
  return (0);                                                   
}



 



 




 

extern volatile int32_t ITM_RxBuffer;                     












 
static __inline uint32_t ITM_SendChar (uint32_t ch)
{
  if ((((ITM_Type *) (0xE0000000UL) )->TCR & (1UL << 0))                  &&       
      (((ITM_Type *) (0xE0000000UL) )->TER & (1UL << 0)        )                    )      
  {
    while (((ITM_Type *) (0xE0000000UL) )->PORT[0].u32 == 0);
    ((ITM_Type *) (0xE0000000UL) )->PORT[0].u8 = (uint8_t) ch;
  }
  return (ch);
}








 
static __inline int32_t ITM_ReceiveChar (void) {
  int32_t ch = -1;                            

  if (ITM_RxBuffer != 0x5AA55AA5) {
    ch = ITM_RxBuffer;
    ITM_RxBuffer = 0x5AA55AA5;        
  }

  return (ch);
}








 
static __inline int32_t ITM_CheckChar (void) {

  if (ITM_RxBuffer == 0x5AA55AA5) {
    return (0);                                  
  } else {
    return (1);                                  
  }
}

 





#line 92 ".\\inc\\1901BC1F.h"

#line 1 ".\\inc\\1901BC1F_spi_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t SSPx_CR0;
  volatile uint32_t SSPx_CR1;
  volatile uint32_t SSPx_DR;
  volatile uint32_t SSPx_SR;
  volatile uint32_t SSPx_CPSR;
  volatile uint32_t SSPx_IMSC;
  volatile uint32_t SSPx_RIS;
  volatile uint32_t SSPx_MIS;
  volatile uint32_t SSPx_ICR;
  volatile uint32_t SSPx_DMACR;
}SPI_TypeDef;

   

   



 



 

















   

   



 



 














   

   



 



 

















   

   



 



 














   

   



 



 














   

   



 



 














   

   



 



 








   

   



 



 








   

   

   

   

   





 
#line 94 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_usb_defs.h"






















 

 





 



 



 



 

typedef struct
{
  volatile uint32_t CTRL;
  volatile uint32_t STS;
  volatile uint32_t TS;
  volatile uint32_t NTS;
}_USB_SEP_TypeDef;



 

typedef struct
{
  volatile uint32_t RXFD;
       uint32_t RESERVED0;
  volatile uint32_t RXFDC_L;
  volatile uint32_t RXFDC_H;
  volatile uint32_t RXFC;
       uint32_t RESERVED1[11];
  volatile uint32_t TXFD;
       uint32_t RESERVED2[3];
  volatile uint32_t TXFDC;
}_USB_SEP_TypeDef0;



 



 

typedef struct
{
  volatile uint32_t HTXC;
  volatile uint32_t HTXT;
  volatile uint32_t HTXLC;
  volatile uint32_t HTXSE;
  volatile uint32_t HTXA;
  volatile uint32_t HTXE;
  volatile uint32_t HFN_L;
  volatile uint32_t HFN_H;
  volatile uint32_t HIS;
  volatile uint32_t HIM;
  volatile uint32_t HRXS;
  volatile uint32_t HRXP;
  volatile uint32_t HRXA;
  volatile uint32_t HRXE;
  volatile uint32_t HRXCS;
  volatile uint32_t HSTM;
       uint32_t RESERVED0[16];
  volatile uint32_t HRXFD;
       uint32_t RESERVED1;
  volatile uint32_t HRXFDC_L;
  volatile uint32_t HRXFDC_H;
  volatile uint32_t HRXFC;
       uint32_t RESERVED2[11];
  volatile uint32_t HTXFD;
       uint32_t RESERVED3[3];
  volatile uint32_t HTXFDC;
       uint32_t RESERVED4[11];
  volatile uint32_t SEP0_CTRL;
  volatile uint32_t SEP0_STS;
  volatile uint32_t SEP0_TS;
  volatile uint32_t SEP0_NTS;
  volatile uint32_t SEP1_CTRL;
  volatile uint32_t SEP1_STS;
  volatile uint32_t SEP1_TS;
  volatile uint32_t SEP1_NTS;
  volatile uint32_t SEP2_CTRL;
  volatile uint32_t SEP2_STS;
  volatile uint32_t SEP2_TS;
  volatile uint32_t SEP2_NTS;
  volatile uint32_t SEP3_CTRL;
  volatile uint32_t SEP3_STS;
  volatile uint32_t SEP3_TS;
  volatile uint32_t SEP3_NTS;
  volatile uint32_t SC;
  volatile uint32_t SLS;
  volatile uint32_t SIS;
  volatile uint32_t SIM;
  volatile uint32_t SA;
  volatile uint32_t SFN_L;
  volatile uint32_t SFN_H;
       uint32_t RESERVED5[9];
  volatile uint32_t SEP0_RXFD;
       uint32_t RESERVED6;
  volatile uint32_t SEP0_RXFDC_L;
  volatile uint32_t SEP0_RXFDC_H;
  volatile uint32_t SEP0_RXFC;
       uint32_t RESERVED7[11];
  volatile uint32_t SEP0_TXFD;
       uint32_t RESERVED8[3];
  volatile uint32_t SEP0_TXFDC;
       uint32_t RESERVED9[11];
  volatile uint32_t SEP1_RXFD;
       uint32_t RESERVED10;
  volatile uint32_t SEP1_RXFDC_L;
  volatile uint32_t SEP1_RXFDC_H;
  volatile uint32_t SEP1_RXFC;
       uint32_t RESERVED11[11];
  volatile uint32_t SEP1_TXFD;
       uint32_t RESERVED12[3];
  volatile uint32_t SEP1_TXFDC;
       uint32_t RESERVED13[11];
  volatile uint32_t SEP2_RXFD;
       uint32_t RESERVED14;
  volatile uint32_t SEP2_RXFDC_L;
  volatile uint32_t SEP2_RXFDC_H;
  volatile uint32_t SEP2_RXFC;
       uint32_t RESERVED15[11];
  volatile uint32_t SEP2_TXFD;
       uint32_t RESERVED16[3];
  volatile uint32_t SEP2_TXFDC;
       uint32_t RESERVED17[11];
  volatile uint32_t SEP3_RXFD;
       uint32_t RESERVED18;
  volatile uint32_t SEP3_RXFDC_L;
  volatile uint32_t SEP3_RXFDC_H;
  volatile uint32_t SEP3_RXFC;
       uint32_t RESERVED19[11];
  volatile uint32_t SEP3_TXFD;
       uint32_t RESERVED20[3];
  volatile uint32_t SEP3_TXFDC;
       uint32_t RESERVED21[11];
  volatile uint32_t HSCR;
  volatile uint32_t HSVR;
}USB_TypeDef;

   

   



 



 














   

   



 



 














   

   



 



 














   

   



 



 














   

   



 



 


























   

   



 



 

















   

   



 



 


























   

   



 



 

















   

   



 



 

















   

   



 



 

















   

   



 



 


























   

   



 



 








   

   

   

   

   





 
#line 95 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_eeprom_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t CMD;
  volatile uint32_t ADR;
  volatile uint32_t DI;
  volatile uint32_t DO;
  volatile uint32_t KEY;
  volatile uint32_t CTRL;
}EEPROM_TypeDef;

   

   



 



 






































   

   



 



 








   

   

   

   

   





 
#line 96 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_rst_clk_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t CLOCK_STATUS;
  volatile uint32_t PLL_CONTROL;
  volatile uint32_t HS_CONTROL;
  volatile uint32_t CPU_CLOCK;
  volatile uint32_t USB_CLOCK;
  volatile uint32_t ADC_MCO_CLOCK;
  volatile uint32_t RTC_CLOCK;
  volatile uint32_t PER_CLOCK;
  volatile uint32_t CAN_CLOCK;
  volatile uint32_t TIM_CLOCK;
  volatile uint32_t UART_CLOCK;
  volatile uint32_t SSP_CLOCK;
  volatile uint32_t DSP_CLOCK;
  volatile uint32_t SSP_CLOCK2;
  volatile uint32_t DSP_CONTROL_STATUS;
}RST_CLK_TypeDef;

   

   



 



 











   

   



 



 




















   

   



 



 








   

   



 



 














   

   



 



 














   

   



 



 

















   

   



 



 














   

   



 



 














   

   



 



 




















   

   



 



 














   

   



 



 














   

   



 



 














   

   



 



 








   

   



 



 



































   

   

   

   

   





 
#line 97 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_dma_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t STATUS;
  volatile uint32_t CFG;
  volatile uint32_t CTRL_BASE_PTR;
  volatile uint32_t ALT_CTRL_BASE_PTR;
  volatile uint32_t WAITONREQ_STATUS;
  volatile uint32_t CHNL_SW_REQUEST;
  volatile uint32_t CHNL_USEBURST_SET;
  volatile uint32_t CHNL_USEBURST_CLR;
  volatile uint32_t CHNL_REQ_MASK_SET;
  volatile uint32_t CHNL_REQ_MASK_CLR;
  volatile uint32_t CHNL_ENABLE_SET;
  volatile uint32_t CHNL_ENABLE_CLR;
  volatile uint32_t CHNL_PRI_ALT_SET;
  volatile uint32_t CHNL_PRI_ALT_CLR;
  volatile uint32_t CHNL_PRIORITY_SET;
  volatile uint32_t CHNL_PRIORITY_CLR;
       uint32_t RESERVED0[3];
  volatile uint32_t ERR_CLR;
}DMA_TypeDef;

   

   



 



 














   

   



 



 








   

   

   

   

   





 
#line 98 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_uart_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t DR;
  volatile uint32_t RSR_ECR;
       uint32_t RESERVED0[4];
  volatile uint32_t FR;
       uint32_t RESERVED1;
  volatile uint32_t ILPR;
  volatile uint32_t IBRD;
  volatile uint32_t FBRD;
  volatile uint32_t LCR_H;
  volatile uint32_t CR;
  volatile uint32_t IFLS;
  volatile uint32_t IMSC;
  volatile uint32_t RIS;
  volatile uint32_t MIS;
  volatile uint32_t ICR;
  volatile uint32_t DMACR;
}UART_TypeDef;

   

   



 



 

















   

   



 



 














   

   



 



 





























   

   



 



 























   

   



 



 






































   

   



 



 








   

   



 



 



































   

   



 



 



































   

   



 



 



































   

   



 



 



































   

   



 



 











   

   

   

   

   





 
#line 99 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_sdio_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t SD_CR;
  volatile uint32_t SD_SR;
  volatile uint32_t SD_CMDDR;
  volatile uint32_t SD_DATDR;
  volatile uint32_t SD_CMDCRC;
  volatile uint32_t SD_DATA0CRC;
  volatile uint32_t SD_DATA1CRC;
  volatile uint32_t SD_DATA2CRC;
  volatile uint32_t SD_DATA3CRC;
  volatile uint32_t SD_CMDtransfer;
  volatile uint32_t SD_DATtransfer;
}SDIO_TypeDef;

   

   



 



 

































































   

   



 



 














   

   

   

   

   





 
#line 100 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_i2c_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t PRL;
  volatile uint32_t PRP;
  volatile uint32_t CTR;
  volatile uint32_t RXD;
  volatile uint32_t STA;
  volatile uint32_t TXD;
  volatile uint32_t CMD;
}I2C_TypeDef;

   

   



 



 











   

   



 



 

















   

   



 



 




















   

   

   

   

   





 
#line 101 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_power_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t PVDCS;
}POWER_TypeDef;

   

   



 



 





























   

   

   

   

   





 
#line 102 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_wwdg_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t CR;
  volatile uint32_t CFR;
  volatile uint32_t SR;
}WWDG_TypeDef;

   

   



 



 








   

   



 



 











   

   

   

   

   





 
#line 103 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_iwdg_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t KR;
  volatile uint32_t PR;
  volatile uint32_t PRL;
  volatile uint32_t SR;
}IWDG_TypeDef;

   

   



 



 








   

   

   

   

   





 
#line 104 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_timer_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t CNT;
  volatile uint32_t PSG;
  volatile uint32_t ARR;
  volatile uint32_t CNTRL;
  volatile uint32_t CCR1;
  volatile uint32_t CCR2;
  volatile uint32_t CCR3;
  volatile uint32_t CCR4;
  volatile uint32_t CH1_CNTRL;
  volatile uint32_t CH2_CNTRL;
  volatile uint32_t CH3_CNTRL;
  volatile uint32_t CH4_CNTRL;
  volatile uint32_t CH1_CNTRL1;
  volatile uint32_t CH2_CNTRL1;
  volatile uint32_t CH3_CNTRL1;
  volatile uint32_t CH4_CNTRL1;
  volatile uint32_t CH1_DTG;
  volatile uint32_t CH2_DTG;
  volatile uint32_t CH3_DTG;
  volatile uint32_t CH4_DTG;
  volatile uint32_t BRKETR_CNTRL;
  volatile uint32_t STATUS;
  volatile uint32_t IE;
  volatile uint32_t DMA_RE;
  volatile uint32_t CH1_CNTRL2;
  volatile uint32_t CH2_CNTRL2;
  volatile uint32_t CH3_CNTRL2;
  volatile uint32_t CH4_CNTRL2;
  volatile uint32_t CCR11;
  volatile uint32_t CCR21;
  volatile uint32_t CCR31;
  volatile uint32_t CCR41;
}TIMER_TypeDef;

   

   



 



 























   

   



 



 





























   

   



 



 




















   

   



 



 











   

   



 



 














   

   



 



 


























   

   



 



 























   

   



 



 























   

   



 



 











   

   

   

   

   





 
#line 105 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_adc_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t ADC1_CFG;
  volatile uint32_t ADC2_CFG;
  volatile uint32_t ADC1_H_LEVEL;
  volatile uint32_t ADC2_H_LEVEL;
  volatile uint32_t ADC1_L_LEVEL;
  volatile uint32_t ADC2_L_LEVEL;
  volatile uint32_t ADC1_RESULT;
  volatile uint32_t ADC2_RESULT;
  volatile uint32_t ADC1_STATUS;
  volatile uint32_t ADC2_STATUS;
  volatile uint32_t ADC1_CHSEL;
  volatile uint32_t ADC2_CHSEL;
}ADC_TypeDef;

   

   



 



 





















































   

   



 



 






































   

   



 



 








   

   



 



 








   

   



 



 

















   

   



 



 

















   

   

   

   

   





 
#line 106 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_dac_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t CFG;
  volatile uint32_t DAC1_DATA;
  volatile uint32_t DAC2_DATA;
}DAC_TypeDef;

   

   



 



 

















   

   



 



 








   

   



 



 








   

   

   

   

   





 
#line 107 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_comp_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t CFG;
  volatile uint32_t RESULT;
  volatile uint32_t RESULT_LATCH;
}COMP_TypeDef;

   

   



 



 
































   

   



 



 











   

   

   

   

   





 
#line 108 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_port_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t RXTX;
  volatile uint32_t OE;
  volatile uint32_t FUNC;
  volatile uint32_t ANALOG;
  volatile uint32_t PULL;
  volatile uint32_t PD;
  volatile uint32_t PWR;
  volatile uint32_t GFEN;
  volatile uint32_t PORTx_SET;
  volatile uint32_t PORTx_CLR;
  volatile uint32_t PORTx_RD;

}PORT_TypeDef;

   

   



 



 


















































   

   



 



 


















































   

   

   

   

   





 

#line 109 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_bkp_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t REG_00;
  volatile uint32_t REG_01;
  volatile uint32_t REG_02;
  volatile uint32_t REG_03;
  volatile uint32_t REG_04;
  volatile uint32_t REG_05;
  volatile uint32_t REG_06;
  volatile uint32_t REG_07;
  volatile uint32_t REG_08;
  volatile uint32_t REG_09;
  volatile uint32_t REG_0A;
  volatile uint32_t REG_0B;
  volatile uint32_t REG_0C;
  volatile uint32_t REG_0D;
  volatile uint32_t REG_0E;
  volatile uint32_t REG_0F;
  volatile uint32_t RTC_CNT;
  volatile uint32_t RTC_DIV;
  volatile uint32_t RTC_PRL;
  volatile uint32_t RTC_ALRM;
  volatile uint32_t RTC_CS;
}BKP_TypeDef;

   

   



 



 























   

   



 



 















































   

   



 



 























   

   

   

   

   





 
#line 110 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_ext_bus_cntrl_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
       uint32_t RESERVED0[20];
  volatile uint32_t NAND_CYCLES;
  volatile uint32_t EXT_BUS_CONTROL;
}EXT_BUS_CNTRL_TypeDef;

   

   



 



 























   

   



 



 




















   

   

   

   

   





 
#line 111 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_dsp_bsp_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t DDR;
  volatile uint32_t DXR;
  volatile uint32_t SPSA;
  volatile uint32_t CtrlD;
}DSP_BSP_TypeDef;

   

   

   

   

   





 
#line 112 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_dsp_tim_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t TIM_PRD;
  volatile uint32_t TCR;
}DSP_TIM_TypeDef;

   

   



 



 






































   

   

   

   

   





 
#line 113 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_dsp_irq_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t IRQ;
}DSP_IRQ_TypeDef;

   

   



 



 






























































   

   

   

   

   





 
#line 114 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_dsp_crpt_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t CWR;
  volatile uint32_t SR;
  volatile uint32_t DATA;
  volatile uint32_t KR;
  volatile uint32_t SYNR;
  volatile uint32_t CR;
  volatile uint32_t IMIT;
  volatile uint32_t ITER;
}DSP_CRPT_TypeDef;

   

   



 



 


























   

   



 



 


























   

   



 



 























   

   

   

   

   





 
#line 115 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_dsp_acd_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t POWCTL;
  volatile uint32_t ADCCTL;
  volatile uint32_t DACCTL;
  volatile uint32_t MASKCTL;
  volatile uint32_t IRQFLAG;
  volatile uint32_t ADCREG;
  volatile uint32_t DACREG;
}DSP_ACD_TypeDef;

   

   



 



 











   

   



 



 









































   

   



 



 


















































   

   



 



 

















   

   



 



 

















   

   

   

   

   





 
#line 116 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_dsp_clk_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t CLKMD;
}DSP_CLK_TypeDef;

   

   



 



 









































   

   

   

   

   





 
#line 117 ".\\inc\\1901BC1F.h"
#line 1 ".\\inc\\1901BC1F_dsp_dma_defs.h"






















 

 





 



 



 



 



 

typedef struct
{
  volatile uint32_t DMA_STATUS;
  volatile uint32_t DMA_CFG;
  volatile uint32_t CTRL_BASE_PTR;
  volatile uint32_t ALT_CTRL_BASE_PTR;
  volatile uint32_t DMA_WAITONREQ_STATUS;
  volatile uint32_t CHNL_SW_REQUEST;
  volatile uint32_t CHNL_USEBURST_SET;
  volatile uint32_t CHNL_USEBURST_CLR;
  volatile uint32_t CHNL_REQ_MASK_SET;
  volatile uint32_t CHNL_REQ_MASK_CLR;
  volatile uint32_t CHNL_ENABLE_SET;
  volatile uint32_t CHNL_ENABLE_CLR;
  volatile uint32_t CHNL_PRI_ALT_SET;
  volatile uint32_t CHNL_PRI_ALT_CLR;
  volatile uint32_t CHNL_PRIORITY_SET;
  volatile uint32_t CHNL_PRIORITY_CLR;
}DSP_DMA_TypeDef;

   

   



 



 

















   

   



 



 








   

   

   

   

   





 
#line 118 ".\\inc\\1901BC1F.h"

typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus;

typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;


typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus;

   




 

#line 172 ".\\inc\\1901BC1F.h"

   



 

#line 218 ".\\inc\\1901BC1F.h"

   

   

   





 
#line 67 "config.h"
#line 1 "ethconfig.c"



 

void EthCfg(void);                                  
																			  
int Write_Tx_Descriptor(unsigned short,_tx_current_descriptor*); 
unsigned short Read_Tx_Descriptor(_tx_descriptor*); 

int Ready_Rx_Descriptor(_rx_descriptor*);           
unsigned short Read_Rx_Descriptor(_rx_descriptor*); 

unsigned short Read_Packet_Start_Address(_rx_descriptor*);     
unsigned short Read_Packet_Length(_rx_descriptor*);            






void EthCfg()
{
	int i;

		((_ethernet *)0x60007F00)->GCTRL = 0x8000;	
		for(i=0;i<1000;i++){}		
		((_ethernet *)0x60007F00)->GCTRL = 0x4382;						   	
		((_ethernet *)0x60007F00)->MinFrame = 0x0040;
    	((_ethernet *)0x60007F00)->CollConfig = 0;
    	((_ethernet *)0x60007F00)->IPGTx = 0x000A;
    	((_ethernet *)0x60007F00)->MAC_ADDR_T = 0x1B0A;
    	((_ethernet *)0x60007F00)->MAC_ADDR_M = 0x3D2C;
    	((_ethernet *)0x60007F00)->MAC_ADDR_H = 0x5F4E;
        ((_ethernet *)0x60007F00)->PHY_CTRL = 0x31D0;
		((_ethernet *)0x60007F00)->MAC_CTRL = 0x0200;  
}







int Write_Tx_Descriptor(unsigned short PacketLen, _tx_current_descriptor* TxCurrentDesc)
{
	unsigned int* MyDesc;
	MyDesc = (unsigned int*)(TxCurrentDesc->TxCurrentDescriptor->StartAddress);

	*(MyDesc+1) = PacketLen;
	*(MyDesc+3) = (TxCurrentDesc->FirstEmptyWord>>2)&0x0000FFFF;

	if(TxCurrentDesc->TxCurrentDescriptor->LastDesc == 1) *MyDesc = 0xC000;
	else *MyDesc = 0x8000;

	TxCurrentDesc->FirstEmptyWord += (PacketLen/2)<<2;	
												
												
	if(TxCurrentDesc->FirstEmptyWord > 0x60005FFC)
	{
		TxCurrentDesc->FirstEmptyWord -= 0x00006000;
		TxCurrentDesc->FirstEmptyWord |= 0x60004000;
	}
    return 0;
}







unsigned short Read_Tx_Descriptor(_tx_descriptor* TxDesc)
{
		unsigned int* MyDesc;
		MyDesc = (unsigned int*)(TxDesc->StartAddress);
        if((*MyDesc & 0x8000) == 0x8000) return 1;            
        else return 0;                                              
}






int Ready_Rx_Descriptor(_rx_descriptor* RxDesc)
{
		unsigned int* MyDesc;
		MyDesc = (unsigned int*)(RxDesc->StartAddress);
		if(RxDesc->LastDesc == 1) *MyDesc = 0xC000;	
		else *MyDesc = 0x8000;						
        return 0;
}







unsigned short Read_Rx_Descriptor(_rx_descriptor* RxDesc)
{
		unsigned int* RDescPointer;
		RDescPointer = (unsigned int*)RxDesc->StartAddress;
        if( (*RDescPointer & 0x8000) == 0x8000) return 1;	
        else return 0;                                      
}






unsigned short Read_Packet_Length(_rx_descriptor* RxDesc)
{
		unsigned int* RDescPointer;
		RDescPointer = (unsigned int*)(RxDesc->StartAddress + 4);		
        return (unsigned short)(*RDescPointer);       
}






unsigned short Read_Packet_Start_Address(_rx_descriptor* RxDesc)
{
        unsigned int* RDescPointer;
		RDescPointer = (unsigned int*)(RxDesc->StartAddress + 12);	
        return (unsigned short)(*RDescPointer);
}

#line 68 "config.h"

void ExtBusCfg(void);
void PortConfig(void);
void ClkCfg(void);






__inline void ExtBusCfg()
{
	((EXT_BUS_CNTRL_TypeDef*)0x400F0000)->EXT_BUS_CONTROL = 0x2002;  
}






void PortConfig()
{

		((PORT_TypeDef*) 0x400A8000)->ANALOG = 0xFFFF;
		((PORT_TypeDef*) 0x400A8000)->PWR = 0xAAAAAAAA;
		((PORT_TypeDef*) 0x400A8000)->FUNC = 0x55555555;


		((PORT_TypeDef*) 0x400B8000)->ANALOG = 0xFFFF; 
		((PORT_TypeDef*) 0x400B8000)->PWR = 0xAAAAAAAA; 
		((PORT_TypeDef*) 0x400B8000)->FUNC = 0x00000014; 





        ((PORT_TypeDef*) 0x400C0000)->RXTX = 0;
        ((PORT_TypeDef*) 0x400C0000)->OE = 0x7C00; 
        ((PORT_TypeDef*) 0x400C0000)->FUNC = 0x00000000; 
        ((PORT_TypeDef*) 0x400C0000)->ANALOG = 0xFF00; 
        ((PORT_TypeDef*) 0x400C0000)->PWR = 0xAAAA0000; 


		((PORT_TypeDef*) 0x400C8000)->ANALOG = 0xFFFF; 
		((PORT_TypeDef*) 0x400C8000)->PWR = 0xAAAAAAAA; 
		((PORT_TypeDef*) 0x400C8000)->RXTX = 0x0000;
		((PORT_TypeDef*) 0x400C8000)->OE = 0x0030;
		((PORT_TypeDef*) 0x400C8000)->FUNC = 0x01000000; 

		((PORT_TypeDef*) 0x400E8000)->ANALOG = 0xFFFF;
		((PORT_TypeDef*) 0x400E8000)->PWR = 0xFFFFFFFF;
		((PORT_TypeDef*) 0x400E8000)->FUNC = 0x55555555;

		((PORT_TypeDef*) 0x400B0000)->RXTX = 0;
        ((PORT_TypeDef*) 0x400B0000)->OE = 0x8000; 
        ((PORT_TypeDef*) 0x400B0000)->FUNC = 0x00000000; 
        ((PORT_TypeDef*) 0x400B0000)->ANALOG = 0xC000; 
        ((PORT_TypeDef*) 0x400B0000)->PWR = 0xC0000000; 
}






void ClkCfg()
{
        ((RST_CLK_TypeDef*) 0x40020000)->HS_CONTROL = 0x00000001;
        while((((RST_CLK_TypeDef*) 0x40020000)->CLOCK_STATUS&0x00000004)!=0x00000004){}
		((RST_CLK_TypeDef*) 0x40020000)->CPU_CLOCK = 0x00000102;
		
		((RST_CLK_TypeDef*) 0x40020000)->PER_CLOCK = 0xffffffff;
}



#line 62 "main.c"
	 

typedef struct
{
        unsigned char Data[1600];       
        unsigned short Length;          
        unsigned short Address;         
        unsigned char Remote_IP[4];     
        unsigned char Remote_MAC[6];    


		unsigned int CounterTxPacket;	
		unsigned int CounterRxPacket;	


} _ethernet_packet;
						   
int Read_Packet(_ethernet_packet*);			
unsigned short CheckSum_IP(_ethernet_packet*);		
unsigned short CheckSum_ICMP(_ethernet_packet*);	
void InitTxDescriptor(void);						
void InitRxDescriptor(void);						
int Answear_ARP(_ethernet_packet*);					
int Answear_ICMP(_ethernet_packet*,unsigned char*);	


void Request_Status(_ethernet_packet*);



_tx_descriptor ATxDescriptor[32] =  {{0x60006000,0x0000,0,0,0,0},{0x60006010,0x0000,0,0,0,0},{0x60006020,0x0000,0,0,0,0},{0x60006030,0x0000,0,0,0,0},
									 {0x60006040,0x0000,0,0,0,0},{0x60006050,0x0000,0,0,0,0},{0x60006060,0x0000,0,0,0,0},{0x60006070,0x0000,0,0,0,0},
									 {0x60006080,0x0000,0,0,0,0},{0x60006090,0x0000,0,0,0,0},{0x600060A0,0x0000,0,0,0,0},{0x600060B0,0x0000,0,0,0,0},
									 {0x600060C0,0x0000,0,0,0,0},{0x600060D0,0x0000,0,0,0,0},{0x600060E0,0x0000,0,0,0,0},{0x600060F0,0x0000,0,0,0,0},
									 {0x60006100,0x0000,0,0,0,0},{0x60006110,0x0000,0,0,0,0},{0x60006120,0x0000,0,0,0,0},{0x60006130,0x0000,0,0,0,0},
									 {0x60006140,0x0000,0,0,0,0},{0x60006150,0x0000,0,0,0,0},{0x60006160,0x0000,0,0,0,0},{0x60006170,0x0000,0,0,0,0},
									 {0x60006180,0x0000,0,0,0,0},{0x60006190,0x0000,0,0,0,0},{0x600061A0,0x0000,0,0,0,0},{0x600061B0,0x0000,0,0,0,0},
									 {0x600061C0,0x0000,0,0,0,0},{0x600061D0,0x0000,0,0,0,0},{0x600061E0,0x0000,0,0,0,0},{0x600061F0,0x4000,0,0,0,1}};


_rx_descriptor	ARxDescriptor[32] = {{0x60002000,0x8000,0,0,0,0},{0x60002010,0x8000,0,0,0,0},{0x60002020,0x8000,0,0,0,0},{0x60002030,0x8000,0,0,0,0},
									 {0x60002040,0x8000,0,0,0,0},{0x60002050,0x8000,0,0,0,0},{0x60002060,0x8000,0,0,0,0},{0x60002070,0x8000,0,0,0,0},
									 {0x60002080,0x8000,0,0,0,0},{0x60002090,0x8000,0,0,0,0},{0x600020A0,0x8000,0,0,0,0},{0x600020B0,0x8000,0,0,0,0},
									 {0x600020C0,0x8000,0,0,0,0},{0x600020D0,0x8000,0,0,0,0},{0x600020E0,0x8000,0,0,0,0},{0x600020F0,0x8000,0,0,0,0},
									 {0x60002100,0x8000,0,0,0,0},{0x60002110,0x8000,0,0,0,0},{0x60002120,0x8000,0,0,0,0},{0x60002130,0x8000,0,0,0,0},
									 {0x60002140,0x8000,0,0,0,0},{0x60002150,0x8000,0,0,0,0},{0x60002160,0x8000,0,0,0,0},{0x60002170,0x8000,0,0,0,0},
									 {0x60002180,0x8000,0,0,0,0},{0x60002190,0x8000,0,0,0,0},{0x600021A0,0x8000,0,0,0,0},{0x600021B0,0x8000,0,0,0,0},
									 {0x600021C0,0x8000,0,0,0,0},{0x600021D0,0x8000,0,0,0,0},{0x600021E0,0x8000,0,0,0,0},{0x600021F0,0xC000,0,0,0,1}};

_tx_current_descriptor TxCurrentDesc;	
_rx_current_descriptor RxCurrentDesc;	
_ethernet_packet Packet;				
unsigned short Temp, TypeOfProtocol;	
unsigned char My_IP[4], My_MAC[6];		
unsigned char Receive_IP[4];			
unsigned char ICMP_Packet[1500];  		


_ethernet* MyEth;						







int main()
{
        ClkCfg();		
        PortConfig();	
		ExtBusCfg();	


		MyEth = ((_ethernet *)0x60007F00);


        My_IP[0] =  0xC0;
        My_IP[1] =  0xA8;
        My_IP[2] =  0x01;
        My_IP[3] =  0x57;

        My_MAC[0] = 0x0A;
        My_MAC[1] = 0x1B;
        My_MAC[2] = 0x2C;
        My_MAC[3] = 0x3D;
        My_MAC[4] = 0x4E;
        My_MAC[5] = 0x5F;

		InitTxDescriptor();	
		InitRxDescriptor();

		EthCfg();
		((PORT_TypeDef*) 0x400B0000)->PORTx_SET=0x8000;


		Packet.CounterRxPacket = 0;
		Packet.CounterTxPacket = 0;



        while(1)
        {
                if(Read_Rx_Descriptor(RxCurrentDesc.RxCurrentDescriptor) == 0) 
                {
                        ((PORT_TypeDef*) 0x400C0000)->RXTX |= 1 << 11;

                        Packet.Length = Read_Packet_Length(RxCurrentDesc.RxCurrentDescriptor);
                        Packet.Address = Read_Packet_Start_Address(RxCurrentDesc.RxCurrentDescriptor);
                        Read_Packet(&Packet);				   

						Ready_Rx_Descriptor(RxCurrentDesc.RxCurrentDescriptor);


						Packet.CounterRxPacket++;


						((_ethernet *)0x60007F00)->RXBF_HEAD = (((_ethernet *)0x60007F00)->RXBF_TAIL-1)&0x07FF;

                        TypeOfProtocol = (Packet.Data[12]<<8)|Packet.Data[13];

                        switch(TypeOfProtocol) 
                        {
                                case 0x0806:    
                                        Receive_IP[0] = Packet.Data[38];
                                        Receive_IP[1] = Packet.Data[39];
                                        Receive_IP[2] = Packet.Data[40];
                                        Receive_IP[3] = Packet.Data[41];

                                        if( (Receive_IP[0] == My_IP[0])&&(Receive_IP[1] == My_IP[1])&&(Receive_IP[2] == My_IP[2])&&(Receive_IP[3] == My_IP[3]))         
                                        {
                                                        Packet.Remote_IP[0] = Packet.Data[28];
                                                        Packet.Remote_IP[1] = Packet.Data[29];
                                                        Packet.Remote_IP[2] = Packet.Data[30];
                                                        Packet.Remote_IP[3] = Packet.Data[31];

                                                        Packet.Remote_MAC[0] = Packet.Data[22];
                                                        Packet.Remote_MAC[1] = Packet.Data[23];
                                                        Packet.Remote_MAC[2] = Packet.Data[24];
                                                        Packet.Remote_MAC[3] = Packet.Data[25];
                                                        Packet.Remote_MAC[4] = Packet.Data[26];
                                                        Packet.Remote_MAC[5] = Packet.Data[27];

                                                        Answear_ARP(&Packet);
                                        }
                                        ((PORT_TypeDef*) 0x400C0000)->RXTX &= 0xF7FF;
                                        break;

                                case 0x0800:    
                                        Receive_IP[0] = Packet.Data[30];
                                        Receive_IP[1] = Packet.Data[31];
                                        Receive_IP[2] = Packet.Data[32];
                                        Receive_IP[3] = Packet.Data[33];

                                        if((Receive_IP[0] == My_IP[0])&&(Receive_IP[1] == My_IP[1])&&(Receive_IP[2] == My_IP[2])&&(Receive_IP[3] == My_IP[3]))  
                                        {
                                                        Temp = CheckSum_IP(&Packet);
                                                        if(Temp == ((Packet.Data[24] << 8)&0xFF00|Packet.Data[25]))  
                                                        {
                                                                Packet.Remote_IP[0] = Packet.Data[26];
                                                                Packet.Remote_IP[1] = Packet.Data[27];
                                                                Packet.Remote_IP[2] = Packet.Data[28];
                                                                Packet.Remote_IP[3] = Packet.Data[29];

                                                                Packet.Remote_MAC[0] = Packet.Data[6];
                                                                Packet.Remote_MAC[1] = Packet.Data[7];
                                                                Packet.Remote_MAC[2] = Packet.Data[8];
                                                                Packet.Remote_MAC[3] = Packet.Data[9];
                                                                Packet.Remote_MAC[4] = Packet.Data[10];
                                                                Packet.Remote_MAC[5] = Packet.Data[11];

                                                                
                                                                if(Packet.Data[23] == 0x01)     
                                                                {																			
																		if(Packet.Data[34] == 0x08) 
                                                                        {
                                                                                Temp = CheckSum_ICMP(&Packet);
                                                                                if(Temp == ((Packet.Data[36] << 8)&0xFF00|Packet.Data[37]))	
                                                                                {
                                                                                        Answear_ICMP(&Packet, ICMP_Packet);
                                                                                }
                                                                        }
                                                                }
                                                        }
                                        }
                                        ((PORT_TypeDef*) 0x400C0000)->RXTX &= 0xF7FF;
                                        break;
                        }
                } 
                ((PORT_TypeDef*) 0x400C0000)->RXTX &= 0xF7FF;

				
				RxCurrentDesc.RxCurrentDescriptor++;
				RxCurrentDesc.Number++;
				if(RxCurrentDesc.Number == 16)
				{
					RxCurrentDesc.RxCurrentDescriptor = ARxDescriptor;
					RxCurrentDesc.Number = 0;	
				}
        }
}






unsigned short CheckSum_IP(_ethernet_packet* Dt)
{
        unsigned long Temp, Check = 0;
        for(Temp = 0; Temp < 20; Temp += 2)
        {
                if(Temp == 10) continue;
                else Check += ((Dt->Data[Temp + 14] << 8)&0xFF00)|Dt->Data[Temp + 15];
        }
        Check = (Check >> 16) + (Check & 0xFFFF);
        return (unsigned short)(~Check);
}





unsigned short CheckSum_ICMP(_ethernet_packet* Dt)
{
        unsigned long Temp, Check = 0;
        for(Temp = 0; Temp < Dt->Length - 38; Temp += 2)      
        {                                                     
                if(Temp == 2) continue;
                else Check += ((Dt->Data[Temp + 34] << 8)&0xFF00)|Dt->Data[Temp + 35];
        }
        Check = (Check >> 16) + (Check & 0xFFFF);
        return (unsigned short)(~Check);
}





int Read_Packet(_ethernet_packet* Dt)
{
        unsigned short Temp,Val;
		unsigned int* MyPointer;
		MyPointer = (unsigned int*)((unsigned int)((unsigned int *)0x60000000) + (unsigned int)(Dt->Address<<2));
		for(Temp=0;Temp<Dt->Length;Temp+=2)
		{
			Val = *MyPointer++;
			Dt->Data[Temp] = (unsigned char)Val;
			Dt->Data[Temp+1] = (unsigned char)(Val>>8);
			if( ((int)MyPointer & 0x00002000) == 0x00002000) MyPointer = ((unsigned int *)0x60000000);
		}
        if((Dt->Length & 0x0001) == 1)  
                                        
        {
                Dt->Data[Dt->Length-4] = 0;
        }
		
        return 0;
}






int Answear_ARP(_ethernet_packet* Dt)
{
        unsigned char Send[42];
        unsigned short Temp;
		unsigned int* MyPointer;
	
        while(Read_Tx_Descriptor(TxCurrentDesc.TxCurrentDescriptor) != 0)
		{
			TxCurrentDesc.TxCurrentDescriptor++;
			TxCurrentDesc.Number++;
			if(TxCurrentDesc.Number == 16)
			{
				TxCurrentDesc.Number = 0;
				TxCurrentDesc.TxCurrentDescriptor = ATxDescriptor;
			}	
		}
		
        
        Send[0] = Dt->Remote_MAC[0];
        Send[1] = Dt->Remote_MAC[1];
        Send[2] = Dt->Remote_MAC[2];
        Send[3] = Dt->Remote_MAC[3];
        Send[4] = Dt->Remote_MAC[4];
        Send[5] = Dt->Remote_MAC[5];

        
        Send[6] = My_MAC[0];
        Send[7] = My_MAC[1];
        Send[8] = My_MAC[2];
        Send[9] = My_MAC[3];
        Send[10] = My_MAC[4];
        Send[11] = My_MAC[5];

        
        for(Temp = 12; Temp < 20; Temp++)
        {
                Send[Temp] = Dt->Data[Temp];
        }

        
        Send[21] = 0x02;
        Send[20] = 0x00;

        

        Send[22] = My_MAC[0];
        Send[23] = My_MAC[1];
        Send[24] = My_MAC[2];
        Send[25] = My_MAC[3];
        Send[26] = My_MAC[4];
        Send[27] = My_MAC[5];

        

        Send[28] = My_IP[0];
        Send[29] = My_IP[1];
        Send[30] = My_IP[2];
        Send[31] = My_IP[3];

        

        Send[32] = Dt->Remote_MAC[0];
        Send[33] = Dt->Remote_MAC[1];
        Send[34] = Dt->Remote_MAC[2];
        Send[35] = Dt->Remote_MAC[3];
        Send[36] = Dt->Remote_MAC[4];
        Send[37] = Dt->Remote_MAC[5];

        

        Send[38] = Dt->Remote_IP[0];
        Send[39] = Dt->Remote_IP[1];
        Send[40] = Dt->Remote_IP[2];
        Send[41] = Dt->Remote_IP[3];
		
		MyPointer = (unsigned int*)TxCurrentDesc.FirstEmptyWord;

		for(Temp=0;Temp<42;Temp+=2)
		{
			*MyPointer++ = Send[Temp]|(Send[Temp+1]<<8);
			if((unsigned int)MyPointer > 0x60005FFC) MyPointer = (unsigned int*)0x60004000;
		}
        
        Write_Tx_Descriptor(0x002A,&TxCurrentDesc);     

 		TxCurrentDesc.TxCurrentDescriptor++;
		TxCurrentDesc.Number++;
		if(TxCurrentDesc.Number == 16)
		{
			TxCurrentDesc.Number = 0;
			TxCurrentDesc.TxCurrentDescriptor = ATxDescriptor;
		}


		Packet.CounterTxPacket++;


		return 0;
}





int Answear_ICMP(_ethernet_packet* Dt , unsigned char* ICMP_Packet)
{
        unsigned short Temp;
		unsigned int* MyPointer;

        while(Read_Tx_Descriptor(TxCurrentDesc.TxCurrentDescriptor) != 0)
		{
			TxCurrentDesc.TxCurrentDescriptor++;
			TxCurrentDesc.Number++;
			if(TxCurrentDesc.Number == 16)
			{
				TxCurrentDesc.Number = 0;
				TxCurrentDesc.TxCurrentDescriptor = ATxDescriptor;
			}
		}
		
        
        ICMP_Packet[0] = Dt->Remote_MAC[0];
        ICMP_Packet[1] = Dt->Remote_MAC[1];
        ICMP_Packet[2] = Dt->Remote_MAC[2];
        ICMP_Packet[3] = Dt->Remote_MAC[3];
        ICMP_Packet[4] = Dt->Remote_MAC[4];
        ICMP_Packet[5] = Dt->Remote_MAC[5];

        
        ICMP_Packet[6] = My_MAC[0];
        ICMP_Packet[7] = My_MAC[1];
        ICMP_Packet[8] = My_MAC[2];
        ICMP_Packet[9] = My_MAC[3];
        ICMP_Packet[10] = My_MAC[4];
        ICMP_Packet[11] = My_MAC[5];

        
        ICMP_Packet[12] = 0x08;
        ICMP_Packet[13] = 0x00;



        
        for(Temp = 14; Temp < 24; Temp++)
        {
                ICMP_Packet[Temp] = Dt->Data[Temp];
        }
        ICMP_Packet[26] = Dt->Data[30];
        ICMP_Packet[27] = Dt->Data[31];
        ICMP_Packet[28] = Dt->Data[32];
        ICMP_Packet[29] = Dt->Data[33];
        
        ICMP_Packet[30] = Dt->Data[26];
        ICMP_Packet[31] = Dt->Data[27];
        ICMP_Packet[32] = Dt->Data[28];
        ICMP_Packet[33] = Dt->Data[29];

        Temp = CheckSum_IP(Dt);

        
        ICMP_Packet[24] = (unsigned char)(Temp >> 8);
        ICMP_Packet[25] = (unsigned char)Temp;



        ICMP_Packet[34] = 0x00; 
        ICMP_Packet[35] = 0x00;

        Dt->Data[34] = 0x00;
        Dt->Data[35] = 0x00;

        Temp = CheckSum_ICMP(Dt);
        ICMP_Packet[36] = (unsigned char)(Temp >> 8);
        ICMP_Packet[37] = (unsigned char)Temp;

        for(Temp = 38; Temp < Dt->Length - 4; Temp++)
        {
                ICMP_Packet[Temp] = Dt->Data[Temp];
        }

		MyPointer = (unsigned int*)TxCurrentDesc.FirstEmptyWord;

        if((Dt->Length & 0x0001) == 1)
        {
                ICMP_Packet[Dt->Length - 4] = Dt->Data[Dt->Length - 4];
                for(Temp=0;Temp<Dt->Length - 3;Temp+=2)
				{
					*MyPointer++ = ICMP_Packet[Temp]|(ICMP_Packet[Temp+1]<<8);
					if((unsigned int)MyPointer > 0x60005FFC) MyPointer = (unsigned int*)0x60004000;
				}
        }
        else
        {
                for(Temp=0;Temp<Dt->Length - 4;Temp+=2)
				{
					*MyPointer++ = ICMP_Packet[Temp]|(ICMP_Packet[Temp+1]<<8);
					if((unsigned int)MyPointer > 0x60005FFC) MyPointer = (unsigned int*)0x60004000;
				}
        }


        Write_Tx_Descriptor(Dt->Length-4,&TxCurrentDesc);     

		TxCurrentDesc.TxCurrentDescriptor++;
		TxCurrentDesc.Number++;
		if(TxCurrentDesc.Number == 16)
		{
			TxCurrentDesc.Number = 0;
			TxCurrentDesc.TxCurrentDescriptor = ATxDescriptor;
		}


		Packet.CounterTxPacket++;


        return 0;
}





void InitTxDescriptor()
{
	unsigned int* TDescPointer;

	TxCurrentDesc.TxCurrentDescriptor = ATxDescriptor;
	TxCurrentDesc.FirstEmptyWord = 0x60004000;

	for(Temp=0;Temp<16;Temp++)
	{
		TDescPointer = (unsigned int*)(TxCurrentDesc.TxCurrentDescriptor->StartAddress);
		*TDescPointer = TxCurrentDesc.TxCurrentDescriptor->Status;
		TxCurrentDesc.TxCurrentDescriptor++;
	}

	TxCurrentDesc.TxCurrentDescriptor--;
	TxCurrentDesc.TxCurrentDescriptor->LastDesc = 1;	
	TDescPointer = (unsigned int*)(TxCurrentDesc.TxCurrentDescriptor->StartAddress);
	*TDescPointer = 0x4000;								

	TxCurrentDesc.Number = 0;
	TxCurrentDesc.TxCurrentDescriptor = ATxDescriptor;
}





void InitRxDescriptor()
{
	unsigned int* RDescPointer;

	RxCurrentDesc.RxCurrentDescriptor = ARxDescriptor;

	for(Temp=0;Temp<16;Temp++)
	{
		RDescPointer = (unsigned int*)(RxCurrentDesc.RxCurrentDescriptor->StartAddress);
		*RDescPointer = RxCurrentDesc.RxCurrentDescriptor->Status;
		RxCurrentDesc.RxCurrentDescriptor++;
	}

	RxCurrentDesc.RxCurrentDescriptor--;
	RxCurrentDesc.RxCurrentDescriptor->LastDesc = 1;	
	RDescPointer = (unsigned int*)(RxCurrentDesc.RxCurrentDescriptor->StartAddress);
	*RDescPointer = 0xC000;								

	RxCurrentDesc.Number = 0;
	RxCurrentDesc.RxCurrentDescriptor = ARxDescriptor;
}



