; generated by ARM C/C++ Compiler, 4.1 [Build 561]
; commandline ArmCC [--debug -c --asm --interleave -o.\obj\core_cm1.o --depend=.\obj\core_cm1.d --cpu=Cortex-M1 --apcs=interwork -O0 -I.\inc -IC:\Keil4\ARM\INC -IC:\Keil4\ARM\INC\ARM --omf_browse=.\obj\core_cm1.crf src\core_cm1.c]
                          THUMB

;*** Start embedded assembler ***

#line 1 "src\\core_cm1.c"
	AREA ||.emb_text||, CODE, READONLY
	THUMB
	EXPORT |__get_PSP|
#line 62
|__get_PSP| PROC
#line 63

 mrs r0, psp
 bx lr
	ENDP
	AREA ||.emb_text||, CODE, READONLY
	THUMB
	EXPORT |__set_PSP|
#line 76
|__set_PSP| PROC
#line 77

 msr psp, r0
 bx lr
	ENDP
	AREA ||.emb_text||, CODE, READONLY
	THUMB
	EXPORT |__get_MSP|
#line 90
|__get_MSP| PROC
#line 91

 mrs r0, msp
 bx lr
	ENDP
	AREA ||.emb_text||, CODE, READONLY
	THUMB
	EXPORT |__set_MSP|
#line 104
|__set_MSP| PROC
#line 105

 msr msp, r0
 bx lr
	ENDP
	AREA ||.emb_text||, CODE, READONLY
	THUMB
	EXPORT |__REV16|
#line 118
|__REV16| PROC
#line 119

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.emb_text||, CODE, READONLY
	THUMB
	EXPORT |__REVSH|
#line 132
|__REVSH| PROC
#line 133

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
