/**
 * @file    startup_1986ve8t.S
 * @brief   GCC startup file for Milandr 1986VE8T (Cortex-M4F)
 * @version Based on Keil startup_1986ve8t.s and MDR32F9Q2I.S example
 */

				.syntax  unified
				.arch armv7-m
				.fpu vfpv4
				.thumb

/* ------------------------------------------------------------------------- */
/* Vector Table                                                              */
/* ------------------------------------------------------------------------- */
.section .vectors, "a", %progbits
.align 2
.globl __Vectors
.globl __Vectors_End
.globl __Vectors_Size

__Vectors:
    .long    __StackTop                         /* Top of Stack */
    .long    Reset_Handler                      /* Reset Handler */
    .long    NMI_Handler                        /* NMI Handler */
    .long    HardFault_Handler                  /* Hard Fault Handler */
    .long    MemoryMngFault_Handler             /* Memory Management Fault */
    .long    BusFault_Handler                   /* Bus Fault Handler */
    .long    UsageFault_Handler                 /* Usage Fault Handler */
    .long    0                                  /* Reserved */
    .long    0                                  /* Reserved */
    .long    0                                  /* Reserved */
    .long    0                                  /* Reserved */
    .long    SVC_Handler                        /* SVCall Handler */
    .long    0                                  /* Reserved */
    .long    0                                  /* Reserved */
    .long    PendSV_Handler                     /* PendSV Handler */
    .long    SysTick_Handler                    /* SysTick Handler */
    .long    0                                  /* Reserved16 */
    .long    0                                  /* Reserved17 */
    .long    0                                  /* Reserved18 */
    .long    0                                  /* Reserved19 */
    .long    0                                  /* Reserved20 */
    .long    0                                  /* Reserved21 */
    .long    0                                  /* Reserved22 */
    .long    0                                  /* Reserved23 */
    .long    0                                  /* Reserved24 */
    .long    0                                  /* Reserved25 */
    .long    0                                  /* Reserved26 */
    .long    0                                  /* Reserved27 */
    .long    0                                  /* Reserved28 */
    .long    0                                  /* Reserved29 */
    .long    0                                  /* Reserved30 */
    .long    0                                  /* Reserved31 */
    .long    0                                  /* Reserved32 */
    .long    0                                  /* Reserved33 */
    .long    0                                  /* Reserved34 */
    .long    0                                  /* Reserved35 */
    .long    0                                  /* Reserved36 */
    .long    0                                  /* Reserved37 */
    .long    0
    .long    0
    .long    0
    .long    0
    .long    0
    .long    0
    .long    0
    .long    0
    .long    0
    .long    0
    .long    FT_IF0_Handler                    /* FT_IF0_Handler */
    .long    FT_IF1_Handler                    /* FT_IF1_Handler */
    .long    FT_IF2_Handler                    /* FT_IF2_Handler */
    .long    FT_IF3_Handler                    /* FT_IF3_Handler */
    .long    CLK_IF_Handler                    /* CLK_IF_Handler */
    .long    PVD_IF_Handler                    /* PVD_IF_Handler */
    .long    RTC_IF_Handler                    /* RTC_IF_Handler */
    .long    BKP_IF_Handler                    /* BKP_IF_Handler */
    .long    EXT_INTERROR0_Handler             /* EXT_INTERROR0_Handler */
    .long    EXT_INTERROR1_Handler             /* EXT_INTERROR1_Handler */
    .long    EXT_INTERROR2_Handler             /* EXT_INTERROR2_Handler */
    .long    EXT_INTERROR3_Handler             /* EXT_INTERROR3_Handler */
    .long    EXT_INTERROR4_Handler             /* EXT_INTERROR4_Handler */
    .long    EXT_INTERROR5_Handler             /* EXT_INTERROR5_Handler */
    .long    EXT_INTERROR6_Handler             /* EXT_INTERROR6_Handler */
    .long    EXT_INTERROR7_Handler             /* EXT_INTERROR7_Handler */
    .long    0                                 /* Reserved */
    .long    0                                 /* Reserved */
    .long    DMA_ERR_Handler                   /* DMA_ERR_Handler */
    .long    DMA_DONE0_Handler                 /* DMA_DONE0_Handler */
    .long    DMA_DONE1_Handler                 /* DMA_DONE1_Handler */
    .long    DMA_DONE2_Handler                 /* DMA_DONE2_Handler */
    .long    DMA_DONE3_Handler                 /* DMA_DONE3_Handler */
    .long    DMA_DONE4_Handler                 /* DMA_DONE4_Handler */
    .long    DMA_DONE5_Handler                 /* DMA_DONE5_Handler */
    .long    DMA_DONE6_Handler                 /* DMA_DONE6_Handler */
    .long    DMA_DONE7_Handler                 /* DMA_DONE7_Handler */
    .long    DMA_DONE8_Handler                 /* DMA_DONE8_Handler */
    .long    DMA_DONE9_Handler                 /* DMA_DONE9_Handler */
    .long    DMA_DONE10_Handler                /* DMA_DONE10_Handler */
    .long    DMA_DONE11_Handler                /* DMA_DONE11_Handler */
    .long    DMA_DONE12_Handler                /* DMA_DONE12_Handler */
    .long    DMA_DONE13_Handler                /* DMA_DONE13_Handler */
    .long    DMA_DONE14_Handler                /* DMA_DONE14_Handler */
    .long    DMA_DONE15_Handler                /* DMA_DONE15_Handler */
    .long    DMA_DONE16_Handler                /* DMA_DONE16_Handler */
    .long    DMA_DONE17_Handler                /* DMA_DONE17_Handler */
    .long    DMA_DONE18_Handler                /* DMA_DONE18_Handler */
    .long    DMA_DONE19_Handler                /* DMA_DONE19_Handler */
    .long    DMA_DONE20_Handler                /* DMA_DONE20_Handler */
    .long    DMA_DONE21_Handler                /* DMA_DONE21_Handler */
    .long    DMA_DONE22_Handler                /* DMA_DONE22_Handler */
    .long    DMA_DONE23_Handler                /* DMA_DONE23_Handler */
    .long    DMA_DONE24_Handler                /* DMA_DONE24_Handler */
    .long    DMA_DONE25_Handler                /* DMA_DONE25_Handler */
    .long    DMA_DONE26_Handler                /* DMA_DONE26_Handler */
    .long    DMA_DONE27_Handler                /* DMA_DONE27_Handler */
    .long    DMA_DONE28_Handler                /* DMA_DONE28_Handler */
    .long    DMA_DONE29_Handler                /* DMA_DONE29_Handler */
    .long    DMA_DONE30_Handler                /* DMA_DONE30_Handler */
    .long    DMA_DONE31_Handler                /* DMA_DONE31_Handler */
    .long    IRQ_PORTA_Handler                 /* IRQ_PORTA_Handler */
    .long    IRQ_PORTB_Handler                 /* IRQ_PORTB_Handler */
    .long    IRQ_PORTC_Handler                 /* IRQ_PORTC_Handler */
    .long    IRQ_PORTD_Handler                 /* IRQ_PORTD_Handler */
    .long    IRQ_PORTE_Handler                 /* IRQ_PORTE_Handler */
    .long    0                                 /* Reserved */
    .long    INT_ETH0_Handler                  /* INT_ETH0_Handler */
    .long    0                                 /* Reserved */
    .long    INT_SPW0_Handler                  /* INT_SPW0_Handler */
    .long    0                                 /* Reserved */
    .long    INT_TMR0_Handler                  /* INT_TMR0_Handler */
    .long    INT_TMR1_Handler                  /* INT_TMR1_Handler */
    .long    INT_TMR2_Handler                  /* INT_TMR2_Handler */
    .long    INT_TMR3_Handler                  /* INT_TMR3_Handler */
    .long    0                                 /* Reserved */
    .long    0                                 /* Reserved */
    .long    INT_CAN0_Handler                  /* INT_CAN0_Handler */
    .long    0                                 /* Reserved */
    .long    0                                 /* Reserved */
    .long    0                                 /* Reserved */
    .long    0                                 /* Reserved */
    .long    INT_SSP0_Handler                  /* INT_SSP0_Handler */
    .long    0                                 /* Reserved */
    .long    0                                 /* Reserved */
    .long    0                                 /* Reserved */
    .long    INT_UART0_Handler                 /* INT_UART0_Handler */
    .long    INT_UART1_Handler                 /* INT_UART1_Handler */
    .long    0                                 /* Reserved */
    .long    0                                 /* Reserved */
    .long    0                                 /* Reserved */
    .long    INT_RX_ARC0_Handler               /* INT_RX_ARC0_Handler */
    .long    INT_TX_ARC0_Handler               /* INT_TX_ARC0_Handler */
    .long    0                                 /* Reserved */
    .long    0                                 /* Reserved */
    .long    INT_MIL0_Handler                  /* INT_MIL0_Handler */
    .long    INT_MIL1_Handler                  /* INT_MIL1_Handler */
    .long    INT_ADC0_Handler                  /* INT_ADC0_Handler */
    .long    INT_ADC1_Handler                  /* INT_ADC1_Handler */
    .long    INT_DAC0_Handler                  /* INT_DAC0_Handler */
    .long    INT_DAC1_Handler                  /* INT_DAC1_Handler */
__Vectors_End:

.equ __Vectors_Size, __Vectors_End - __Vectors
.size __Vectors, . - __Vectors

/* ------------------------------------------------------------------------- */
/* Reset Handler                                                             */
/* ------------------------------------------------------------------------- */
.section .text, "ax", %progbits
.thumb_func
.globl Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
    bl      SystemInit

    /* Copy data from ROM to RAM (if linker tables are defined) */
    ldr     r4, =__copy_table_start__
    ldr     r5, =__copy_table_end__
.L_copy_loop:
    cmp     r4, r5
    bge     .L_copy_done
    ldr     r1, [r4]          /* source address */
    ldr     r2, [r4, #4]      /* destination address */
    ldr     r3, [r4, #8]      /* word count */
    lsls    r3, r3, #2        /* byte count */
.L_copy_sub:
    subs    r3, #4
    ittt    ge
    ldrge   r0, [r1, r3]
    strge   r0, [r2, r3]
    bge     .L_copy_sub
    adds    r4, #12
    b       .L_copy_loop
.L_copy_done:

    /* Zero BSS section */
    ldr     r3, =__zero_table_start__
    ldr     r4, =__zero_table_end__
.L_zero_loop:
    cmp     r3, r4
    bge     .L_zero_done
    ldr     r1, [r3]          /* destination address */
    ldr     r2, [r3, #4]      /* word count */
    lsls    r2, r2, #2        /* byte count */
    movs    r0, #0
.L_zero_sub:
    subs    r2, #4
    itt     ge
    strge   r0, [r1, r2]
    bge     .L_zero_sub
    adds    r3, #8
    b       .L_zero_loop
.L_zero_done:

    /* Call entry point (_start from standard library or main) */
    bl      _start
    /* Infinite loop if return */
.L_loop:
    b       .L_loop
.size Reset_Handler, . - Reset_Handler

/* ------------------------------------------------------------------------- */
/* Default Handlers (weak, infinite loop)                                    */
/* ------------------------------------------------------------------------- */
.macro def_default_handler handler_name
    .thumb_func
    .weak \handler_name
    .type \handler_name, %function
\handler_name:
    b .
    .size \handler_name, . - \handler_name
.endm

def_default_handler NMI_Handler
def_default_handler HardFault_Handler
def_default_handler MemoryMngFault_Handler
def_default_handler BusFault_Handler
def_default_handler UsageFault_Handler
def_default_handler SVC_Handler
def_default_handler PendSV_Handler
def_default_handler SysTick_Handler
def_default_handler FT_IF0_Handler
def_default_handler FT_IF1_Handler
def_default_handler FT_IF2_Handler
def_default_handler FT_IF3_Handler
def_default_handler CLK_IF_Handler
def_default_handler PVD_IF_Handler
def_default_handler RTC_IF_Handler
def_default_handler BKP_IF_Handler
def_default_handler EXT_INTERROR0_Handler
def_default_handler EXT_INTERROR1_Handler
def_default_handler EXT_INTERROR2_Handler
def_default_handler EXT_INTERROR3_Handler
def_default_handler EXT_INTERROR4_Handler
def_default_handler EXT_INTERROR5_Handler
def_default_handler EXT_INTERROR6_Handler
def_default_handler EXT_INTERROR7_Handler
def_default_handler DMA_ERR_Handler
def_default_handler DMA_DONE0_Handler
def_default_handler DMA_DONE1_Handler
def_default_handler DMA_DONE2_Handler
def_default_handler DMA_DONE3_Handler
def_default_handler DMA_DONE4_Handler
def_default_handler DMA_DONE5_Handler
def_default_handler DMA_DONE6_Handler
def_default_handler DMA_DONE7_Handler
def_default_handler DMA_DONE8_Handler
def_default_handler DMA_DONE9_Handler
def_default_handler DMA_DONE10_Handler
def_default_handler DMA_DONE11_Handler
def_default_handler DMA_DONE12_Handler
def_default_handler DMA_DONE13_Handler
def_default_handler DMA_DONE14_Handler
def_default_handler DMA_DONE15_Handler
def_default_handler DMA_DONE16_Handler
def_default_handler DMA_DONE17_Handler
def_default_handler DMA_DONE18_Handler
def_default_handler DMA_DONE19_Handler
def_default_handler DMA_DONE20_Handler
def_default_handler DMA_DONE21_Handler
def_default_handler DMA_DONE22_Handler
def_default_handler DMA_DONE23_Handler
def_default_handler DMA_DONE24_Handler
def_default_handler DMA_DONE25_Handler
def_default_handler DMA_DONE26_Handler
def_default_handler DMA_DONE27_Handler
def_default_handler DMA_DONE28_Handler
def_default_handler DMA_DONE29_Handler
def_default_handler DMA_DONE30_Handler
def_default_handler DMA_DONE31_Handler
def_default_handler IRQ_PORTA_Handler
def_default_handler IRQ_PORTB_Handler
def_default_handler IRQ_PORTC_Handler
def_default_handler IRQ_PORTD_Handler
def_default_handler IRQ_PORTE_Handler
def_default_handler INT_ETH0_Handler
def_default_handler INT_SPW0_Handler
def_default_handler INT_TMR0_Handler
def_default_handler INT_TMR1_Handler
def_default_handler INT_TMR2_Handler
def_default_handler INT_TMR3_Handler
def_default_handler INT_CAN0_Handler
def_default_handler INT_SSP0_Handler
def_default_handler INT_UART0_Handler
def_default_handler INT_UART1_Handler
def_default_handler INT_RX_ARC0_Handler
def_default_handler INT_TX_ARC0_Handler
def_default_handler INT_MIL0_Handler
def_default_handler INT_MIL1_Handler
def_default_handler INT_ADC0_Handler
def_default_handler INT_ADC1_Handler
def_default_handler INT_DAC0_Handler
def_default_handler INT_DAC1_Handler

/* End of file */
